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74LVC2G86GM vs 74AUP3G04GM,125 feature comparison

74LVC2G86GM NXP Semiconductors

Buy Now Datasheet

74AUP3G04GM,125 NXP Semiconductors

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Rohs Code Yes Yes
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer NXP SEMICONDUCTORS NXP SEMICONDUCTORS
Part Package Code QFN QFN
Package Description 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8
Pin Count 8 8
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z AUP/ULP/V
JESD-30 Code S-PQCC-N8 S-PQCC-N8
Length 1.6 mm 1.6 mm
Load Capacitance (CL) 50 pF 30 pF
Logic IC Type XOR GATE INVERTER
Max I(ol) 0.024 A 0.0017 A
Moisture Sensitivity Level 1 1
Number of Functions 2 3
Number of Inputs 2 1
Number of Terminals 8 8
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code HVQCCN VQCCN
Package Equivalence Code LCC8,.06SQ,20 LCC8,.06SQ,20
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE
Packing Method TR TR
Peak Reflow Temperature (Cel) 260 260
Prop. Delay@Nom-Sup 5.9 ns 20.9 ns
Propagation Delay (tpd) 12.4 ns 20.9 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger NO NO
Seated Height-Max 0.5 mm 0.5 mm
Supply Voltage-Max (Vsup) 5.5 V 3.6 V
Supply Voltage-Min (Vsup) 1.65 V 0.8 V
Supply Voltage-Nom (Vsup) 3.3 V 1.2 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Form NO LEAD NO LEAD
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 30 30
Width 1.6 mm 1.6 mm
Base Number Matches 3 2
Manufacturer Package Code SOT902-2
JESD-609 Code e4
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Logic » Gates
Logic » Gates

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