Part Details for 74LVC2G17GV by NXP Semiconductors
Overview of 74LVC2G17GV by NXP Semiconductors
- Distributor Offerings: (2 listings)
- Number of FFF Equivalents: (3 crosses)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (10 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Price & Stock for 74LVC2G17GV
| Part # | Distributor | Description | Stock | Price | Buy | |
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Quest Components | Logic Circuit, Dual Buffer, LVC-CMOS, 6 Pin, Plastic, TSOP | 2428 |
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$0.0650 / $0.2000 | Buy Now |
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Win Source Electronics | Schmitt Trigger Buffer 2-CH Non-Inverting CMOS 6-Pin TSOP / IC BUFF SCHMT TRG DL N-INV 6TSOP | 1173711 |
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$0.0680 / $0.0850 | Buy Now |
Part Details for 74LVC2G17GV
74LVC2G17GV CAD Models
74LVC2G17GV Part Data Attributes:
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74LVC2G17GV
NXP Semiconductors
Buy Now
Datasheet
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Compare Parts:
74LVC2G17GV
NXP Semiconductors
IC LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SC-74, SOT-457, TSOP-6, Gate
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| Pbfree Code | Yes | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Transferred | |
| Ihs Manufacturer | NXP SEMICONDUCTORS | |
| Part Package Code | TSOP | |
| Package Description | PLASTIC, SC-74, SOT-457, TSOP-6 | |
| Pin Count | 6 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 | |
| Family | LVC/LCX/Z | |
| JESD-30 Code | R-PDSO-G6 | |
| JESD-609 Code | e3 | |
| Length | 2.9 mm | |
| Load Capacitance (CL) | 50 pF | |
| Logic IC Type | BUFFER | |
| Max I(ol) | 0.024 A | |
| Moisture Sensitivity Level | 1 | |
| Number of Functions | 2 | |
| Number of Inputs | 1 | |
| Number of Terminals | 6 | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | TSSOP | |
| Package Equivalence Code | TSOP6,.11,37 | |
| Package Shape | RECTANGULAR | |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
| Packing Method | TR | |
| Peak Reflow Temperature (Cel) | 260 | |
| Prop. Delay@Nom-Sup | 7.1 ns | |
| Propagation Delay (tpd) | 13.1 ns | |
| Qualification Status | Not Qualified | |
| Schmitt Trigger | YES | |
| Seated Height-Max | 1.1 mm | |
| Supply Voltage-Max (Vsup) | 5.5 V | |
| Supply Voltage-Min (Vsup) | 1.65 V | |
| Supply Voltage-Nom (Vsup) | 1.8 V | |
| Surface Mount | YES | |
| Technology | CMOS | |
| Temperature Grade | AUTOMOTIVE | |
| Terminal Finish | Tin (Sn) | |
| Terminal Form | GULL WING | |
| Terminal Pitch | 0.95 mm | |
| Terminal Position | DUAL | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Width | 1.5 mm |
Alternate Parts for 74LVC2G17GV
This table gives cross-reference parts and alternative options found for 74LVC2G17GV. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of 74LVC2G17GV, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
| Part Number | Description | Manufacturer | Compare |
|---|---|---|---|
| 74LVC2G17GV | Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6 | Nexperia | 74LVC2G17GV vs 74LVC2G17GV |
| 74LVC2G17GV,125 | 74LVC2G17 - Dual non-inverting Schmitt trigger with 5 V tolerant input TSOP 6-Pin | NXP Semiconductors | 74LVC2G17GV vs 74LVC2G17GV,125 |
| 74LVC2G17GV,125 | 74LVC2G17 - Dual non-inverting Schmitt trigger with 5 V tolerant input@en-us TSOP 6-Pin | Nexperia | 74LVC2G17GV vs 74LVC2G17GV,125 |