GAL22V10D-15LSN vs EP610ASC-12 feature comparison

GAL22V10D-15LSN Lattice Semiconductor Corporation

Buy Now Datasheet

EP610ASC-12 Altera Corporation

Buy Now Datasheet
Pbfree Code Yes
Rohs Code Yes No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer LATTICE SEMICONDUCTOR CORP ALTERA CORP
Part Package Code SOIC SOIC
Package Description SOP, SOP, SOP24,.4
Pin Count 24 24
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 55.5 MHz 83.3 MHz
JESD-30 Code R-PDSO-G24 R-PDSO-G24
Length 15.4 mm 15.4 mm
Number of Dedicated Inputs 11 4
Number of I/O Lines 10 16
Number of Terminals 24 24
Operating Temperature-Max 75 °C 70 °C
Operating Temperature-Min
Organization 11 DEDICATED INPUTS, 10 I/O 4 DEDICATED INPUTS, 16 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Equivalence Code SOP24,.4 SOP24,.4
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Cel) 260 220
Programmable Logic Type EE PLD OT PLD
Propagation Delay 15 ns 12 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2.65 mm 2.65 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL EXTENDED COMMERCIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 40
Width 7.5 mm 7.5 mm
Base Number Matches 1 1
Additional Feature MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture PAL-TYPE
JESD-609 Code e0
Number of Inputs 20
Number of Outputs 16
Number of Product Terms 160
Terminal Finish TIN LEAD

Compare GAL22V10D-15LSN with alternatives

Compare EP610ASC-12 with alternatives