CD74HC280E96
vs
SN74LS848JDS
feature comparison
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
HARRIS SEMICONDUCTOR
|
MOTOROLA INC
|
| Package Description |
DIP,
|
DIP, DIP16,.3
|
| Reach Compliance Code |
unknown
|
unknown
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Additional Feature |
ODD/EVEN PARITY GENERATOR
|
8 TO 3 LINE PRIORITY ENCODER; CASCADABLE; WITH GROUP SELECT OUTPUT
|
| Family |
HC/UH
|
LS
|
| JESD-30 Code |
R-PDIP-T14
|
R-GDIP-T16
|
| Length |
19.17 mm
|
19.495 mm
|
| Logic IC Type |
PARITY GENERATOR/CHECKER
|
ENCODER
|
| Number of Bits |
9
|
8
|
| Number of Functions |
1
|
1
|
| Number of Terminals |
14
|
16
|
| Operating Temperature-Max |
125 °C
|
70 °C
|
| Operating Temperature-Min |
-55 °C
|
|
| Output Polarity |
COMPLEMENTARY
|
|
| Package Body Material |
PLASTIC/EPOXY
|
CERAMIC, GLASS-SEALED
|
| Package Code |
DIP
|
DIP
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Propagation Delay (tpd) |
300 ns
|
35 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
5.33 mm
|
5.08 mm
|
| Supply Voltage-Max (Vsup) |
6 V
|
5.25 V
|
| Supply Voltage-Min (Vsup) |
2 V
|
4.75 V
|
| Surface Mount |
NO
|
NO
|
| Technology |
CMOS
|
TTL
|
| Temperature Grade |
MILITARY
|
COMMERCIAL
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Pitch |
2.54 mm
|
2.54 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
7.62 mm
|
7.62 mm
|
| Base Number Matches |
1
|
1
|
| Rohs Code |
|
No
|
| JESD-609 Code |
|
e0
|
| Output Characteristics |
|
3-STATE
|
| Package Equivalence Code |
|
DIP16,.3
|
| Supply Voltage-Nom (Vsup) |
|
5 V
|
| Terminal Finish |
|
TIN LEAD
|
|
|
|
Compare CD74HC280E96 with alternatives
Compare SN74LS848JDS with alternatives