5962-9314401MZX vs 5962-9314401MZC feature comparison

5962-9314401MZX Altera Corporation

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5962-9314401MZC Cypress Semiconductor

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer ALTERA CORP CYPRESS SEMICONDUCTOR CORP
Part Package Code PGA PGA
Package Description PGA, WPGA, PGA100M,13X13
Pin Count 100 100
Reach Compliance Code unknown unknown
ECCN Code 3A001.A.2.C 3A001.A.2.C
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 22.2 MHz 22.2 MHz
JESD-30 Code S-CPGA-P100 S-CPGA-P100
Number of Dedicated Inputs 19 19
Number of I/O Lines 64 64
Number of Terminals 100 100
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 19 DEDICATED INPUTS, 64 I/O 19 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code PGA WPGA
Package Equivalence Code PGA100(UNSPEC) PGA100M,13X13
Package Shape SQUARE SQUARE
Package Style GRID ARRAY GRID ARRAY, WINDOW
Programmable Logic Type UV PLD UV PLD
Propagation Delay 75 ns 75 ns
Qualification Status Not Qualified Not Qualified
Screening Level MIL-STD-883 Class B MIL-STD-883
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Form PIN/PEG PIN/PEG
Terminal Position PERPENDICULAR PERPENDICULAR
Base Number Matches 1 1
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
In-System Programmable NO
JESD-609 Code e4
JTAG BST NO
Length 33.3375 mm
Number of Macro Cells 128
Seated Height-Max 5.207 mm
Terminal Finish GOLD
Terminal Pitch 2.54 mm
Width 33.3375 mm

Compare 5962-9314401MZX with alternatives

Compare 5962-9314401MZC with alternatives