5962-8946801YA
vs
CY7C346-30RMB
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Active
Obsolete
Ihs Manufacturer
TELEDYNE E2V (UK) LTD
CYPRESS SEMICONDUCTOR CORP
Reach Compliance Code
compliant
not_compliant
ECCN Code
3A001.A.2.C
3A001.A.2.C
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock Frequency-Max
22.2 MHz
27.7 MHz
In-System Programmable
NO
NO
JESD-30 Code
S-CQCC-J68
S-CPGA-P100
JESD-609 Code
e0
e0
JTAG BST
NO
NO
Length
24.13 mm
33.3375 mm
Number of Dedicated Inputs
7
19
Number of I/O Lines
52
64
Number of Macro Cells
128
128
Number of Terminals
68
100
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-55 °C
-55 °C
Organization
7 DEDICATED INPUTS, 52 I/O
19 DEDICATED INPUTS, 64 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
WQCCJ
WPGA
Package Equivalence Code
LDCC68,1.0SQ
PGA100M,13X13
Package Shape
SQUARE
SQUARE
Package Style
CHIP CARRIER, WINDOW
GRID ARRAY, WINDOW
Programmable Logic Type
UV PLD
UV PLD
Propagation Delay
75 ns
59 ns
Qualification Status
Qualified
Not Qualified
Screening Level
38535Q/M;38534H;883B
38535Q/M;38534H;883B
Seated Height-Max
5.08 mm
5.715 mm
Supply Voltage-Max
5.5 V
5.5 V
Supply Voltage-Min
4.5 V
4.5 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
YES
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
MILITARY
Terminal Finish
TIN LEAD
TIN LEAD
Terminal Form
J BEND
PIN/PEG
Terminal Pitch
1.27 mm
2.54 mm
Terminal Position
QUAD
PERPENDICULAR
Width
24.13 mm
33.3375 mm
Base Number Matches
3
2
Rohs Code
Part Package Code
PGA
Package Description
WINDOWED, CERAMIC, PGA-100
Pin Count
100
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Compare CY7C346-30RMB with alternatives