Parametric results for: xc6vhx565t-2ffg1924e under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Manufacturer Moisture Sensitivity Level Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Finish Terminal Form

1.286 GHz 2

2 hits Apply

Combinatorial Delay of a CLB-Max (1)

310 ps 1

2 hits Apply

S-PBGA-B1924 2

2 hits Apply

e1 2

2 hits Apply

Manufacturer (2)

AMD 1 AMD Xilinx 1

2 hits Apply

4 2

2 hits Apply

Number of Inputs (1)

640 2

2 hits Apply

Number of Logic Cells (1)

566784 2

2 hits Apply

Number of Outputs (1)

640 2

2 hits Apply

1924 2

2 hits Apply

100.0 °C 1

2 hits Apply

0.0 °C 1

2 hits Apply

44280 CLBS 1

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

BGA 2

2 hits Apply

BGA1924,44X44,40 2

2 hits Apply

Package Shape (1)

SQUARE 2

2 hits Apply

GRID ARRAY 2

2 hits Apply

Active 1 Transferred 1

2 hits Apply

245 2

2 hits Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 2

2 hits Apply

Not Qualified 2

2 hits Apply

Yes 2

2 hits Apply

1.05 V 1

2 hits Apply

950 mV 1

2 hits Apply

Supply Voltage-Nom (1)

1 V 1

2 hits Apply

YES 2

2 hits Apply

CMOS 2

2 hits Apply

TIN SILVER COPPER 2

2 hits Apply

BALL 2

2 hits Apply