Parametric results for: xc6slx100t-3nfgg900q under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Terminal Finish Terminal Form

806 MHz 1

2 hits Apply

Combinatorial Delay of a CLB-Max (1)

260 ps 1

2 hits Apply

S-PBGA-B900 1

2 hits Apply

e1 2

2 hits Apply

31 mm 1

2 hits Apply

Manufacturer (2)

AMD 1 AMD Xilinx 1

2 hits Apply

3 2

2 hits Apply

Number of CLBs (1)

7911 1

2 hits Apply

Number of Inputs (1)

498 1

2 hits Apply

Number of Logic Cells (1)

101261 1

2 hits Apply

Number of Outputs (1)

498 1

2 hits Apply

900 1

2 hits Apply

125.0 °C 1

2 hits Apply

-40.0 °C 1

2 hits Apply

7911 CLBS 1

2 hits Apply

PLASTIC/EPOXY 1

2 hits Apply

BGA 1

2 hits Apply

BGA900,30X30,40 1

2 hits Apply

Package Shape (1)

SQUARE 1

2 hits Apply

GRID ARRAY 1

2 hits Apply

Active 1 Transferred 1

2 hits Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 2

2 hits Apply

Yes 2

2 hits Apply

2.6 mm 1

2 hits Apply

1.26 V 1

2 hits Apply

1.14 V 1

2 hits Apply

Supply Voltage-Nom (1)

1.2 V 1

2 hits Apply

YES 1

2 hits Apply

TIN SILVER COPPER 2

2 hits Apply

BALL 1

2 hits Apply