Parametric results for: sn54104 under FF/Latches

All Filters Additional Feature Family JESD-30 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type

4-IN AND GATED J/K INPUTS 2

3 hits Apply

Family (1)

TTL/H/L 2

3 hits Apply

R-GDFP-F14 1 R-GDIP-T14 1 R-PDIP-T14 1

3 hits Apply

9.21 mm 1 19.56 mm 1

Min (mm) - Max (mm)

3 hits Apply

Load Capacitance (CL) (1)

15 pF 2

3 hits Apply

J-K FLIP-FLOP 3

3 hits Apply

Manufacturer (1)

Texas Instruments 3

3 hits Apply

Number of Bits (1)

2 2

3 hits Apply

Number of Functions (1)

1.0 3

3 hits Apply

14 3

3 hits Apply

125.0 °C 3

3 hits Apply

-55.0 °C 3

3 hits Apply

COMPLEMENTARY 2

3 hits Apply

CERAMIC, GLASS-SEALED 2 PLASTIC/EPOXY 1

3 hits Apply

Package Code (2)

DFP 1 DIP 2

3 hits Apply

DIP14,.3 2 FL14,.3 1

3 hits Apply

RECTANGULAR 3

3 hits Apply

FLATPACK 1 IN-LINE 2

3 hits Apply

Propagation Delay (tpd) (1)

25 ns 2

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

3 hits Apply

Surface Mount (2)

NO 2 YES 1

3 hits Apply

Trigger Type (2)

MASTER-SLAVE 1 POSITIVE EDGE 2

3 hits Apply