Parametric results for: cy7c43265pc under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

65 ns 1

1 hit Apply

RETRANSMIT 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

12.5 MHz 1

1 hit Apply

Cycle Time (1)

80 ns 1

1 hit Apply

R-PDIP-T28 1

1 hit Apply

e0 1

1 hit Apply

37.211 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

36.864 kbit 1

1 hit Apply

OTHER FIFO 1

1 hit Apply

Memory Width (1)

9 1

1 hit Apply

1.0 1

1 hit Apply

28 1

1 hit Apply

4.096 k 1

1 hit Apply

4000.0 1

1 hit Apply

ASYNCHRONOUS 1

1 hit Apply

70.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

4KX9 1

1 hit Apply

3-STATE 1

1 hit Apply

NO 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

DIP 1

1 hit Apply

DIP28,.6 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

IN-LINE 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

5 V 1

1 hit Apply