Parametric results for: cy7c388p2nc under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

MAX 172 I/OS; OTP BASED 1

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258 MHz 1

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Combinatorial Delay of a CLB-Max (1)

6.875 ns 1

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S-PQFP-G208 1

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e0 1

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28 mm 1

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Manufacturer (1)

Cypress Semiconductor 1

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Number of CLBs (1)

768 1

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Number of Equivalent Gates (1)

8000 1

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Number of Inputs (1)

180 1

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Number of Logic Cells (1)

768 1

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Number of Outputs (1)

172 1

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208 1

1 hit Apply

70.0 °C 1

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0.0 °C 1

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768 CLBS, 8000 GATES 1

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PLASTIC/EPOXY 1

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FQFP 1

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QFP208,1.2SQ,20 1

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Package Shape (1)

SQUARE 1

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FLATPACK, FINE PITCH 1

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Obsolete 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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No 1

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3.7 mm 1

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5.25 V 1

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4.75 V 1

1 hit Apply

Supply Voltage-Nom (1)

5 V 1

1 hit Apply

YES 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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TIN LEAD 1

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GULL WING 1

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