Parametric results for: cy7c1412kv18-300bzxc under SRAMs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

450 ps 2

2 hits Apply

PIPELINED ARCHITECTURE 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

300 MHz 2

2 hits Apply

SEPARATE 2

2 hits Apply

R-PBGA-B165 2

2 hits Apply

e1 2

2 hits Apply

15 mm 2

2 hits Apply

Manufacturer (2)

Cypress Semiconductor 1 Infineon Technologies AG 1

2 hits Apply

Memory Density (1)

37.7487 Mbit 2

2 hits Apply

QDR SRAM 2

2 hits Apply

Memory Width (1)

18 2

2 hits Apply

3 2

2 hits Apply

1.0 2

2 hits Apply

165 2

2 hits Apply

2.0972 M 2

2 hits Apply

2000000.0 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

70.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

Organization (1)

2MX18 2

2 hits Apply

3-STATE 2

2 hits Apply

NO 1

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

LBGA 2

2 hits Apply

BGA165,11X15,40 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

GRID ARRAY, LOW PROFILE 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 2

2 hits Apply