Parametric results for: XCV50-4HQ240C under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Temperature Grade Terminal Finish Terminal Form

250 MHz 1

1 hit Apply

Combinatorial Delay of a CLB-Max (1)

800 ps 1

1 hit Apply

S-PQFP-G240 1

1 hit Apply

e0 1

1 hit Apply

32 mm 1

1 hit Apply

Manufacturer (1)

AMD Xilinx 1

1 hit Apply

3 1

1 hit Apply

Number of CLBs (1)

384 1

1 hit Apply

Number of Equivalent Gates (1)

57906 1

1 hit Apply

240 1

1 hit Apply

85.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

384 CLBS, 57906 GATES 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

HFQFP 1

1 hit Apply

Package Shape (1)

SQUARE 1

1 hit Apply

FLATPACK, HEAT SINK/SLUG, FINE PITCH 1

1 hit Apply

Obsolete 1

1 hit Apply

225 1

1 hit Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

1 hit Apply

Not Qualified 1

1 hit Apply

No 1

1 hit Apply

4.1 mm 1

1 hit Apply

2.625 V 1

1 hit Apply

2.375 V 1

1 hit Apply

Supply Voltage-Nom (1)

2.5 V 1

1 hit Apply

YES 1

1 hit Apply

Temperature Grade (1)

OTHER 1

1 hit Apply

Tin/Lead (Sn85Pb15) 1

1 hit Apply

GULL WING 1

1 hit Apply