Parametric results for: XCKU100-2FLVD1924E under Field Programmable Gate Arrays

All Filters JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Terminal Finish Terminal Form

S-PBGA-B1924 2

2 hits Apply

e1 2

2 hits Apply

45 mm 2

2 hits Apply

Manufacturer (2)

AMD 1 AMD Xilinx 1

2 hits Apply

4 1

2 hits Apply

Number of CLBs (1)

4200 2

2 hits Apply

Number of Inputs (1)

832 2

2 hits Apply

Number of Logic Cells (1)

958440 2

2 hits Apply

Number of Outputs (1)

832 2

2 hits Apply

1924 2

2 hits Apply

100.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

4200 CLBS 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

BGA 2

2 hits Apply

BGA1924,44X44,40 2

2 hits Apply

Package Shape (1)

SQUARE 2

2 hits Apply

GRID ARRAY 2

2 hits Apply

Active 1 Transferred 1

2 hits Apply

245 1

2 hits Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 2

2 hits Apply

Yes 2

2 hits Apply

4.13 mm 2

2 hits Apply

979 mV 2

2 hits Apply

922 mV 2

2 hits Apply

Supply Voltage-Nom (1)

950 mV 2

2 hits Apply

YES 2

2 hits Apply

TIN SILVER COPPER 2

2 hits Apply

BALL 2

2 hits Apply