Parametric results for: XC7S25-2CSGA324C under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Temperature Grade Terminal Finish Terminal Form

1.286 GHz 1

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Combinatorial Delay of a CLB-Max (1)

1.05 ns 1

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S-PBGA-B324 1

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e1 1

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15 mm 1

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Manufacturer (1)

AMD Xilinx 1

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Number of CLBs (1)

1825 1

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Number of Inputs (1)

150 1

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Number of Logic Cells (1)

23360 1

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Number of Outputs (1)

150 1

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324 1

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85.0 °C 1

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0.0 °C 1

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1825 CLBS 1

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PLASTIC/EPOXY 1

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LFBGA 1

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BGA324,18X18,32 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY, LOW PROFILE, FINE PITCH 1

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Transferred 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Yes 1

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1.5 mm 1

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1.05 V 1

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950 mV 1

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Supply Voltage-Nom (1)

1 V 1

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YES 1

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Temperature Grade (1)

OTHER 1

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TIN SILVER COPPER 1

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BALL 1

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