Parametric results for: XC7K325T-2FFV676C under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Inputs Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Temperature Grade Terminal Finish Terminal Form Combinatorial Delay of a CLB-Max (1)

610 ps 1

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S-PBGA-B676 1

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e1 1

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27 mm 1

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Manufacturer (1)

AMD Xilinx 1

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Number of CLBs (1)

25475 1

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Number of Inputs (1)

400 1

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Number of Outputs (1)

400 1

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676 1

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85.0 °C 1

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0.0 °C 1

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25475 CLBS 1

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PLASTIC/EPOXY 1

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BGA 1

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BGA676,26X26,40 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY 1

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Obsolete 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Yes 1

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3.37 mm 1

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1.03 V 1

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970 mV 1

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Supply Voltage-Nom (1)

1 V 1

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YES 1

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Temperature Grade (1)

OTHER 1

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TIN SILVER COPPER 1

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BALL 1

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