Parametric results for: XC3195-4PC84C under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

MAX. 176 I/OS; 1320 FLIP-FLOPS; TYP. GATES = 6500 - 9000 1

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230 MHz 1

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Combinatorial Delay of a CLB-Max (1)

3.3 ns 1

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S-PQCC-J84 1

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e0 1

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29.3116 mm 1

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Manufacturer (1)

AMD Xilinx 1

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3 1

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Number of CLBs (1)

484 1

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Number of Equivalent Gates (1)

6500 1

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Number of Inputs (1)

70 1

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Number of Logic Cells (1)

484 1

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Number of Outputs (1)

70 1

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84 1

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70.0 °C 1

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0.0 °C 1

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484 CLBS, 6500 GATES 1

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PLASTIC/EPOXY 1

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QCCJ 1

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LDCC84,1.2SQ 1

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Package Shape (1)

SQUARE 1

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CHIP CARRIER 1

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Obsolete 1

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225 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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No 1

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4.699 mm 1

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5.25 V 1

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4.75 V 1

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Supply Voltage-Nom (1)

5 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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TIN LEAD 1

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J BEND 1

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