Parametric results for: XC201870PG84B883 under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code Length Manufacturer Number of CLBs Number of Equivalent Gates Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Qualification Status Screening Level Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Form

174 FLIP-FLOPS; TYP. GATES = 1000-1500 1

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70 MHz 1

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Combinatorial Delay of a CLB-Max (1)

10 ns 1

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S-CPGA-P84 1

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27.94 mm 1

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Manufacturer (1)

AMD Xilinx 1

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Number of CLBs (1)

100 1

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Number of Equivalent Gates (1)

1000 1

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84 1

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125.0 °C 1

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-55.0 °C 1

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100 CLBS, 1000 GATES 1

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CERAMIC, METAL-SEALED COFIRED 1

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PGA 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY 1

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Transferred 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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Screening Level (1)

MIL-STD-883 1

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5.207 mm 1

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5.5 V 1

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4.5 V 1

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Supply Voltage-Nom (1)

5 V 1

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NO 1

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CMOS 1

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Temperature Grade (1)

MILITARY 1

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PIN/PEG 1

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