Parametric results for: XC17128DDD8M under EEPROMs

All Filters Additional Feature Clock Frequency-Max (fCLK) I/O Type JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Power Supplies Supply Voltage-Nom (Vsup)

USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS 1

2 hits Apply

Clock Frequency-Max (fCLK) (1)

12.5 MHz 2

2 hits Apply

COMMON 2

2 hits Apply

R-GDIP-T8 2

2 hits Apply

e0 2

2 hits Apply

9.906 mm 1 10.16 mm 1

Min (mm) - Max (mm)

2 hits Apply

Manufacturer (1)

AMD Xilinx 2

2 hits Apply

Memory Density (1)

131.072 kbit 2

2 hits Apply

CONFIGURATION MEMORY 2

2 hits Apply

Memory Width (1)

1 2

2 hits Apply

1 1

2 hits Apply

1.0 2

2 hits Apply

8 2

2 hits Apply

131.072 k 2

2 hits Apply

128000.0 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

125.0 °C 2

2 hits Apply

-55.0 °C 2

2 hits Apply

Organization (1)

128KX1 2

2 hits Apply

3-STATE 2

2 hits Apply

CERAMIC, GLASS-SEALED 2

2 hits Apply

DIP 2

2 hits Apply

DIP8,.3 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

IN-LINE 2

2 hits Apply

Power Supplies (1)

5 V 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

2 hits Apply