Parametric results for: T54LS55D2 under Gates

All Filters JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount

R-XDIP-T14 2

2 hits Apply

e0 1

2 hits Apply

20 mm 1

2 hits Apply

Load Capacitance (CL) (1)

15 pF 1

2 hits Apply

AND-OR-INVERT GATE 2

2 hits Apply

Manufacturer (2)

SGS-Ates Componenti Electronici SPA 1 STMicroelectronics 1

2 hits Apply

4 mA 1

2 hits Apply

14 2

2 hits Apply

125.0 °C 2

2 hits Apply

-55.0 °C 2

2 hits Apply

CERAMIC 2

2 hits Apply

Package Code (1)

DIP 2

2 hits Apply

DIP14,.3 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

IN-LINE 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

20 ns 1

2 hits Apply

Schmitt Trigger (1)

NO 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

2 hits Apply

Surface Mount (1)

NO 2

2 hits Apply