Parametric results for: SN74S20N under Gates

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

S 10

12 hits Apply

R-PDIP-T14 10

12 hits Apply

e4 3

12 hits Apply

19.305 mm 7

12 hits Apply

Load Capacitance (CL) (1)

15 pF 6

12 hits Apply

NAND GATE 12

12 hits Apply

Manufacturer (2)

Rochester Electronics LLC 4 Texas Instruments 8

12 hits Apply

16 mA 2 20 mA 3

Min (A) - Max (A)

12 hits Apply

Number of Functions (1)

2.0 10

12 hits Apply

Number of Inputs (1)

4 10

12 hits Apply

14 10

12 hits Apply

70.0 °C 10

12 hits Apply

0.0 °C 10

12 hits Apply

PLASTIC/EPOXY 10

12 hits Apply

Package Code (1)

DIP 10

12 hits Apply

DIP14,.3 6

12 hits Apply

RECTANGULAR 10

12 hits Apply

IN-LINE 10

12 hits Apply

Prop. Delay@Nom-Sup (2)

4.5 ns 2 5 ns 3

Min (ns) - Max (ns)

12 hits Apply

Propagation Delay (tpd) (2)

5 ns 8 22 ns 2

Min (ns) - Max (ns)

12 hits Apply

Schmitt Trigger (1)

NO 6

12 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 10

12 hits Apply

Surface Mount (1)

NO 10

12 hits Apply