Parametric results for: SN5450J under Gates

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount

1 EXPANDABLE FUNCTION 2

2 hits Apply

Family (1)

TTL/H/L 2

2 hits Apply

R-GDIP-T14 2

2 hits Apply

e0 1

2 hits Apply

19.56 mm 2

2 hits Apply

Load Capacitance (CL) (1)

15 pF 2

2 hits Apply

AND-OR-INVERT GATE 2

2 hits Apply

Manufacturer (1)

Texas Instruments 2

2 hits Apply

-400 µA 1

2 hits Apply

Number of Functions (1)

2.0 2

2 hits Apply

Number of Inputs (1)

4 2

2 hits Apply

14 2

2 hits Apply

125.0 °C 2

2 hits Apply

-55.0 °C 2

2 hits Apply

CERAMIC, GLASS-SEALED 2

2 hits Apply

Package Code (1)

DIP 2

2 hits Apply

DIP14,.3 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

IN-LINE 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

15 ns 1

2 hits Apply

Propagation Delay (tpd) (2)

15 ns 1 20 ns 1

Min (ns) - Max (ns)

2 hits Apply

Schmitt Trigger (1)

NO 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

2 hits Apply

Surface Mount (1)

NO 2

2 hits Apply