Parametric results for: RTAX250S-1CQ208PROTO under Field Programmable Gate Arrays

All Filters Additional Feature Combinatorial Delay of a CLB-Max JESD-30 Code Length Manufacturer Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Rohs Code Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Form

30000 ASIC GATES ALSO AVAILABLE 3

3 hits Apply

Combinatorial Delay of a CLB-Max (1)

930 ps 3

3 hits Apply

S-CQFP-F208 3

3 hits Apply

29.21 mm 3

3 hits Apply

Manufacturer (3)

Microchip Technology Inc 1 Microsemi Corporation 1 Microsemi FPGA & SoC 1

3 hits Apply

Number of CLBs (1)

2816 3

3 hits Apply

Number of Equivalent Gates (1)

250000 3

3 hits Apply

Number of Inputs (1)

115 3

3 hits Apply

Number of Logic Cells (1)

4224 3

3 hits Apply

Number of Outputs (1)

115 3

3 hits Apply

208 3

3 hits Apply

125.0 °C 3

3 hits Apply

-55.0 °C 3

3 hits Apply

2816 CLBS, 250000 GATES 3

3 hits Apply

CERAMIC, METAL-SEALED COFIRED 3

3 hits Apply

GQFF 3

3 hits Apply

TPAK208,1.8SQ,25 3

3 hits Apply

Package Shape (1)

SQUARE 3

3 hits Apply

FLATPACK, GUARD RING 3

3 hits Apply

Active 1 Transferred 2

3 hits Apply

NOT SPECIFIED 3

3 hits Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 3

3 hits Apply

No 2

3 hits Apply

1.575 V 3

3 hits Apply

1.425 V 3

3 hits Apply

Supply Voltage-Nom (1)

1.5 V 3

3 hits Apply

YES 3

3 hits Apply

CMOS 3

3 hits Apply

FLAT 3

3 hits Apply