Parametric results for: IDT7202LA20DG under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

20 ns 3

3 hits Apply

RETRANSMIT 2

3 hits Apply

Clock Frequency-Max (fCLK) (1)

33.3 MHz 3

3 hits Apply

Cycle Time (1)

30 ns 3

3 hits Apply

R-CDIP-T28 1 R-GDIP-T28 2

3 hits Apply

e3 3

3 hits Apply

37.211 mm 2

3 hits Apply

Manufacturer (1)

Integrated Device Technology Inc 3

3 hits Apply

Memory Density (1)

9.216 kbit 3

3 hits Apply

OTHER FIFO 3

3 hits Apply

Memory Width (1)

9 3

3 hits Apply

1.0 3

3 hits Apply

28 3

3 hits Apply

1.024 k 3

3 hits Apply

1000.0 3

3 hits Apply

ASYNCHRONOUS 3

3 hits Apply

70.0 °C 1 125.0 °C 2

Min (°C) - Max (°C)

3 hits Apply

-55.0 °C 2 0.0 °C 1

Min (°C) - Max (°C)

3 hits Apply

Organization (1)

1KX9 3

3 hits Apply

NO 3

3 hits Apply

CERAMIC, GLASS-SEALED 2 CERAMIC, METAL-SEALED COFIRED 1

3 hits Apply

DIP 3

3 hits Apply

DIP28,.6 3

3 hits Apply

RECTANGULAR 3

3 hits Apply

IN-LINE 3

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

3 hits Apply