Parametric results for: ICE40LP1K-SWG16TR1K under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code Length Manufacturer Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Form Combinatorial Delay of a CLB-Max (1)

9.36 ns 1

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R-PBGA-B16 1

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1.48 mm 1

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Manufacturer (1)

Lattice Semiconductor Corporation 1

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Number of CLBs (1)

160 1

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Number of Inputs (1)

10 1

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Number of Logic Cells (1)

1280 1

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Number of Outputs (1)

10 1

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16 1

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100.0 °C 1

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-40.0 °C 1

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160 CLBS 1

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PLASTIC/EPOXY 1

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VFBGA 1

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Package Shape (1)

RECTANGULAR 1

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GRID ARRAY, VERY THIN PROFILE, FINE PITCH 1

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Active 1

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NOT SPECIFIED 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Yes 1

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491 µm 1

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1.26 V 1

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1.14 V 1

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Supply Voltage-Nom (1)

1.2 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

INDUSTRIAL 1

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BALL 1

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