Parametric results for: ICE40LP1K-CB81TR1K under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Peak Reflow Temperature (Cel) Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form Combinatorial Delay of a CLB-Max (1)

9.36 ns 1

1 hit Apply

S-PBGA-B81 1

1 hit Apply

e1 1

1 hit Apply

5 mm 1

1 hit Apply

Manufacturer (1)

Lattice Semiconductor Corporation 1

1 hit Apply

3 1

1 hit Apply

Number of CLBs (1)

160 1

1 hit Apply

Number of Inputs (1)

63 1

1 hit Apply

Number of Logic Cells (1)

1280 1

1 hit Apply

Number of Outputs (1)

63 1

1 hit Apply

81 1

1 hit Apply

100.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

160 CLBS 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

VFBGA 1

1 hit Apply

Package Shape (1)

SQUARE 1

1 hit Apply

GRID ARRAY, VERY THIN PROFILE, FINE PITCH 1

1 hit Apply

Active 1

1 hit Apply

NOT SPECIFIED 1

1 hit Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

1 hit Apply

Yes 1

1 hit Apply

1 mm 1

1 hit Apply

1.26 V 1

1 hit Apply

1.14 V 1

1 hit Apply

Supply Voltage-Nom (1)

1.2 V 1

1 hit Apply

YES 1

1 hit Apply

CMOS 1

1 hit Apply

Temperature Grade (1)

INDUSTRIAL 1

1 hit Apply

Tin/Silver/Copper (Sn/Ag/Cu) 1

1 hit Apply

BALL 1

1 hit Apply