Parametric results for: HYB18L128160BC-75 under DRAMs

All Filters Access Mode Access Time-Max Additional Feature Clock Frequency-Max (fCLK) I/O Type Interleaved Burst Length JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Ports Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Package Body Material Package Code Package Equivalence Code Package Shape Package Style Refresh Cycles Supply Voltage-Nom (Vsup) Access Mode (1)

FOUR BANK PAGE BURST 2

2 hits Apply

Access Time-Max (1)

5.4 ns 2

2 hits Apply

AUTO/SELF REFRESH 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

133 MHz 2

2 hits Apply

COMMON 2

2 hits Apply

1,2,4,8 2

2 hits Apply

R-PBGA-B54 2

2 hits Apply

e0 2

2 hits Apply

12 mm 2

2 hits Apply

Manufacturer (2)

Infineon Technologies AG 1 Qimonda AG 1

2 hits Apply

Memory Density (1)

134.2177 Mbit 2

2 hits Apply

SYNCHRONOUS DRAM 2

2 hits Apply

Memory Width (1)

16 2

2 hits Apply

1.0 2

2 hits Apply

1 2

2 hits Apply

54 2

2 hits Apply

8.3886 M 2

2 hits Apply

8000000.0 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

70.0 °C 2

2 hits Apply

0.0 °C 2

2 hits Apply

Organization (1)

8MX16 2

2 hits Apply

3-STATE 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

FBGA 1 VFBGA 1

2 hits Apply

BGA54,9X9,32 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

GRID ARRAY, FINE PITCH 1 GRID ARRAY, VERY THIN PROFILE, FINE PITCH 1

2 hits Apply

Refresh Cycles (1)

4096 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 2

2 hits Apply