Parametric results for: EP1SGX40DF1020I5ES under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Pbfree Code Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Finish Terminal Form

6 MHz 1

2 hits Apply

Combinatorial Delay of a CLB-Max (1)

7.49 ns 1

2 hits Apply

S-PBGA-B1020 2

2 hits Apply

e0 2

2 hits Apply

33 mm 2

2 hits Apply

Manufacturer (2)

Altera Corporation 1 Intel Corporation 1

2 hits Apply

Number of CLBs (1)

4125 1

2 hits Apply

Number of Inputs (1)

624 1

2 hits Apply

Number of Logic Cells (1)

41250 1

2 hits Apply

Number of Outputs (1)

624 1

2 hits Apply

1020 2

2 hits Apply

100.0 °C 1

2 hits Apply

-40.0 °C 1

2 hits Apply

4125 CLBS 1

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

BGA 2

2 hits Apply

Package Shape (1)

SQUARE 2

2 hits Apply

GRID ARRAY 2

2 hits Apply

Active 1 Transferred 1

2 hits Apply

No 1

2 hits Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 2

2 hits Apply

Not Qualified 2

2 hits Apply

No 2

2 hits Apply

3.5 mm 2

2 hits Apply

1.575 V 2

2 hits Apply

1.425 V 2

2 hits Apply

Supply Voltage-Nom (1)

1.5 V 2

2 hits Apply

YES 2

2 hits Apply

CMOS 2

2 hits Apply

TIN LEAD 2

2 hits Apply

BALL 2

2 hits Apply