Parametric results for: CYF1072V under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Moisture Sensitivity Level Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

10 ns 2

2 hits Apply

ALSO REQUIRES 1.8V SUPPLY; SELECTABLE MEMORY ORGANIZATION-X9, X12 ,X16, X18, X20, X24, X32 2

2 hits Apply

Clock Frequency-Max (fCLK) (1)

100 MHz 2

2 hits Apply

Cycle Time (1)

41.67 ns 2

2 hits Apply

R-PBGA-B209 2

2 hits Apply

e1 2

2 hits Apply

22 mm 2

2 hits Apply

Manufacturer (1)

Cypress Semiconductor 2

2 hits Apply

Memory Density (1)

75.4975 Mbit 2

2 hits Apply

OTHER FIFO 2

2 hits Apply

Memory Width (1)

36 2

2 hits Apply

3 2

2 hits Apply

1.0 2

2 hits Apply

209 2

2 hits Apply

2.0972 M 2

2 hits Apply

2000000.0 2

2 hits Apply

SYNCHRONOUS 2

2 hits Apply

85.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

Organization (1)

2MX36 2

2 hits Apply

YES 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

BGA 2

2 hits Apply

BGA209,11X19,40 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

GRID ARRAY 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.5 V 2

2 hits Apply