Parametric results for: CY7C40415DC under FIFOs

All Filters Access Time-Max Additional Feature Clock Frequency-Max (fCLK) Cycle Time JESD-30 Code JESD-609 Code Length Manufacturer Memory Density Memory IC Type Memory Width Number of Functions Number of Terminals Number of Words Number of Words Code Operating Mode Operating Temperature-Max Operating Temperature-Min Organization Output Characteristics Output Enable Package Body Material Package Code Package Equivalence Code Package Shape Package Style Supply Voltage-Nom (Vsup) Access Time-Max (1)

40 ns 1

1 hit Apply

BUBBLE BACK 65NS 1

1 hit Apply

Clock Frequency-Max (fCLK) (1)

15 MHz 1

1 hit Apply

Cycle Time (1)

66.67 ns 1

1 hit Apply

R-GDIP-T18 1

1 hit Apply

e0 1

1 hit Apply

22.606 mm 1

1 hit Apply

Manufacturer (1)

Cypress Semiconductor 1

1 hit Apply

Memory Density (1)

320 bit 1

1 hit Apply

OTHER FIFO 1

1 hit Apply

Memory Width (1)

5 1

1 hit Apply

1.0 1

1 hit Apply

18 1

1 hit Apply

64 words 1

1 hit Apply

64.0 1

1 hit Apply

ASYNCHRONOUS 1

1 hit Apply

70.0 °C 1

1 hit Apply

0.0 °C 1

1 hit Apply

Organization (1)

64X5 1

1 hit Apply

3-STATE 1

1 hit Apply

YES 1

1 hit Apply

CERAMIC, GLASS-SEALED 1

1 hit Apply

DIP 1

1 hit Apply

DIP18,.3 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

IN-LINE 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

5 V 1

1 hit Apply