Parametric results for: CY7C384A-0GC under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

MAX. 68 I/OS; OTP BASED 1

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208.1 MHz 1

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Combinatorial Delay of a CLB-Max (1)

8.06 ns 1

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S-CPGA-P84 1

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e0 1

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27.94 mm 1

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Manufacturer (1)

Cypress Semiconductor 1

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Number of CLBs (1)

192 1

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Number of Equivalent Gates (1)

2000 1

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Number of Inputs (1)

76 1

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Number of Logic Cells (1)

192 1

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Number of Outputs (1)

68 1

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84 1

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70.0 °C 1

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0.0 °C 1

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192 CLBS, 2000 GATES 1

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CERAMIC, METAL-SEALED COFIRED 1

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PGA 1

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PGA84M,11X11 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY 1

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Obsolete 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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No 1

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4.953 mm 1

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5.25 V 1

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4.75 V 1

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Supply Voltage-Nom (1)

5 V 1

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NO 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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TIN LEAD 1

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PIN/PEG 1

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