Parametric results for: CD54ACT280F3A under Arithmetic Circuits

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount

ODD/EVEN PARITY GENERATOR 1

4 hits Apply

Family (1)

ACT 1

4 hits Apply

R-GDIP-T14 1 R-XDIP-T14 3

4 hits Apply

e0 4

4 hits Apply

19.56 mm 1

4 hits Apply

Load Capacitance (CL) (1)

50 pF 1

4 hits Apply

PARITY GENERATOR/CHECKER 4

4 hits Apply

Manufacturer (4)

Harris Semiconductor 1 Intersil Corporation 1 RCA 1 Texas Instruments 1

4 hits Apply

75 mA 1

4 hits Apply

Number of Bits (1)

9 1

4 hits Apply

Number of Functions (1)

9.0 1

4 hits Apply

14 4

4 hits Apply

125.0 °C 4

4 hits Apply

-55.0 °C 4

4 hits Apply

COMPLEMENTARY 1

4 hits Apply

CERAMIC 3 CERAMIC, GLASS-SEALED 1

4 hits Apply

Package Code (1)

DIP 4

4 hits Apply

DIP14,.3 4

4 hits Apply

RECTANGULAR 4

4 hits Apply

IN-LINE 4

4 hits Apply

Prop. Delay@Nom-Sup (1)

19.6 ns 1

4 hits Apply

Propagation Delay (tpd) (1)

21.6 ns 1

4 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 4

4 hits Apply

Surface Mount (1)

NO 4

4 hits Apply