Parametric results for: CD54ACT112F3A under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

ACT 2

4 hits Apply

R-GDIP-T16 2 R-XDIP-T16 2

4 hits Apply

e0 4

4 hits Apply

19.56 mm 1

4 hits Apply

Load Capacitance (CL) (1)

50 pF 4

4 hits Apply

J-K FLIP-FLOP 4

4 hits Apply

Manufacturer (4)

Harris Semiconductor 1 Intersil Corporation 1 RCA 1 Texas Instruments 1

4 hits Apply

Max Frequency@Nom-Sup (1)

100 MHz 3

4 hits Apply

24 mA 4

4 hits Apply

Number of Bits (1)

2 2

4 hits Apply

Number of Functions (1)

2.0 4

4 hits Apply

16 4

4 hits Apply

125.0 °C 4

4 hits Apply

-55.0 °C 4

4 hits Apply

COMPLEMENTARY 2

4 hits Apply

CERAMIC 2 CERAMIC, GLASS-SEALED 2

4 hits Apply

Package Code (1)

DIP 4

4 hits Apply

DIP16,.3 4

4 hits Apply

RECTANGULAR 4

4 hits Apply

IN-LINE 4

4 hits Apply

Prop. Delay@Nom-Sup (1)

11.1 ns 1

4 hits Apply

Propagation Delay (tpd) (1)

10.3 ns 1

4 hits Apply

Schmitt Trigger (1)

NO 1

4 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 4

4 hits Apply

Surface Mount (1)

NO 4

4 hits Apply

Trigger Type (1)

NEGATIVE EDGE 4

4 hits Apply