Parametric results for: CD4049UBF3A under Gates

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount

CMOS-TTL LEVEL TRANSLATOR 1

8 hits Apply

Family (1)

4000/14000/40000 4

8 hits Apply

R-GDIP-T16 4 R-XDIP-T16 2

8 hits Apply

e0 6

8 hits Apply

19.05 mm 1

8 hits Apply

Load Capacitance (CL) (1)

50 pF 3

8 hits Apply

INVERTER 6

8 hits Apply

Manufacturer (5)

Harris Semiconductor 1 Intersil Corporation 1 RCA 1 Rochester Electronics LLC 2 Texas Instruments 3

8 hits Apply

1.8 mA 2 18 mA 1

Min (A) - Max (A)

8 hits Apply

Number of Functions (1)

6.0 4

8 hits Apply

Number of Inputs (1)

1 4

8 hits Apply

16 6

8 hits Apply

125.0 °C 6

8 hits Apply

-55.0 °C 6

8 hits Apply

CERAMIC 2 CERAMIC, GLASS-SEALED 4

8 hits Apply

Package Code (1)

DIP 6

8 hits Apply

DIP16,.3 4

8 hits Apply

RECTANGULAR 6

8 hits Apply

IN-LINE 6

8 hits Apply

Prop. Delay@Nom-Sup (1)

120 ns 3

8 hits Apply

Propagation Delay (tpd) (1)

120 ns 3

8 hits Apply

Schmitt Trigger (1)

NO 4

8 hits Apply

Supply Voltage-Nom (Vsup) (2)

5 V 1 10 V 3

Min (V) - Max (V)

8 hits Apply

Surface Mount (1)

NO 6

8 hits Apply