Parametric results for: CD4027BMN under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

4000/14000/40000 2

3 hits Apply

R-PDIP-T16 3

3 hits Apply

e0 3

3 hits Apply

19.305 mm 2

3 hits Apply

Load Capacitance (CL) (1)

50 pF 3

3 hits Apply

J-K FLIP-FLOP 3

3 hits Apply

Manufacturer (3)

Fairchild Semiconductor Corporation 1 National Semiconductor Corporation 1 Texas Instruments 1

3 hits Apply

Max Frequency@Nom-Sup (1)

2.5 MHz 3

3 hits Apply

Number of Bits (1)

2 2

3 hits Apply

Number of Functions (1)

2.0 3

3 hits Apply

16 3

3 hits Apply

125.0 °C 3

3 hits Apply

-55.0 °C 3

3 hits Apply

COMPLEMENTARY 2

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

Package Code (1)

DIP 3

3 hits Apply

DIP16,.3 3

3 hits Apply

RECTANGULAR 3

3 hits Apply

IN-LINE 3

3 hits Apply

Propagation Delay (tpd) (1)

400 ns 2

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

3 hits Apply

Surface Mount (1)

NO 3

3 hits Apply

Trigger Type (2)

MASTER-SLAVE 1 POSITIVE EDGE 2

3 hits Apply