Parametric results for: ATH3000L-20UC under Programmable Logic Devices

All Filters Additional Feature Architecture Clock Frequency-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of Dedicated Inputs Number of I/O Lines Number of Inputs Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Output Function Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Propagation Delay Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

PAL WITH MACROCELLS; 56 MACROCELLS; 2 EXTERNAL CLOCKS 1

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PAL-TYPE 1

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31.3 MHz 1

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S-CPGA-P68 1

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e0 1

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29.464 mm 1

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Manufacturer (1)

Atmel Corporation 1

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Number of Dedicated Inputs (1)

2 1

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Number of I/O Lines (1)

56 1

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Number of Inputs (1)

56 1

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Number of Outputs (1)

56 1

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68 1

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70.0 °C 1

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0.0 °C 1

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2 DEDICATED INPUTS, 56 I/O 1

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MACROCELL 1

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CERAMIC, METAL-SEALED COFIRED 1

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WPGA 1

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PGA68,11X11 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY, WINDOW 1

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Obsolete 1

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Programmable Logic Type (1)

UV PLD 1

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Propagation Delay (1)

20 ns 1

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Not Qualified 1

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No 1

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5.08 mm 1

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5.5 V 1

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4.5 V 1

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Supply Voltage-Nom (1)

5 V 1

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NO 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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Tin/Lead (Sn/Pb) 1

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PIN/PEG 1

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