Parametric results for: 74aup2g80gt115 under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

AUP/ULP/V 2

2 hits Apply

R-PDSO-N8 2

2 hits Apply

e3 2

2 hits Apply

1.95 mm 2

2 hits Apply

Load Capacitance (CL) (1)

30 pF 1

2 hits Apply

D FLIP-FLOP 2

2 hits Apply

Manufacturer (2)

Nexperia 1 NXP Semiconductors 1

2 hits Apply

Max Frequency@Nom-Sup (1)

70 MHz 1

2 hits Apply

1.7 mA 1

2 hits Apply

1 2

2 hits Apply

Number of Bits (1)

1 2

2 hits Apply

Number of Functions (1)

2.0 2

2 hits Apply

8 2

2 hits Apply

125.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

TRUE 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

Package Code (1)

VSON 2

2 hits Apply

SOLCC8,.04,20 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

SMALL OUTLINE, VERY THIN PROFILE 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

27.2 ns 1

2 hits Apply

Propagation Delay (tpd) (1)

27.2 ns 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.2 V 2

2 hits Apply

Surface Mount (1)

YES 2

2 hits Apply

Trigger Type (1)

POSITIVE EDGE 2

2 hits Apply