Parametric results for: 74LVQ02TTR under Gates

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

LVQ 1

1 hit Apply

R-PDSO-G14 1

1 hit Apply

e0 1

1 hit Apply

5 mm 1

1 hit Apply

Load Capacitance (CL) (1)

50 pF 1

1 hit Apply

NOR GATE 1

1 hit Apply

Manufacturer (1)

STMicroelectronics 1

1 hit Apply

24 mA 1

1 hit Apply

Number of Functions (1)

4.0 1

1 hit Apply

Number of Inputs (1)

2 1

1 hit Apply

14 1

1 hit Apply

125.0 °C 1

1 hit Apply

-55.0 °C 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

Package Code (1)

TSSOP 1

1 hit Apply

TSSOP14,.25 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH 1

1 hit Apply

Prop. Delay@Nom-Sup (1)

9.5 ns 1

1 hit Apply

Propagation Delay (tpd) (1)

13.5 ns 1

1 hit Apply

Schmitt Trigger (1)

NO 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

2.7 V 1

1 hit Apply

Surface Mount (1)

YES 1

1 hit Apply