Parametric results for: 74LV109DB-T under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

LV/LV-A/LVX/H 1

2 hits Apply

R-PDSO-G16 2

2 hits Apply

e0 1

2 hits Apply

6.2 mm 1

2 hits Apply

Load Capacitance (CL) (1)

50 pF 2

2 hits Apply

J-K FLIP-FLOP 1 J-KBAR FLIP-FLOP 1

2 hits Apply

Manufacturer (2)

NXP Semiconductors 1 Philips Semiconductors 1

2 hits Apply

Max Frequency@Nom-Sup (1)

20 MHz 1

2 hits Apply

6 mA 1

2 hits Apply

Number of Bits (1)

2 1

2 hits Apply

Number of Functions (1)

2.0 2

2 hits Apply

16 2

2 hits Apply

125.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

COMPLEMENTARY 1

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

Package Code (1)

SSOP 2

2 hits Apply

SSOP16,.3 1

2 hits Apply

RECTANGULAR 2

2 hits Apply

SMALL OUTLINE, SHRINK PITCH 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

41 ns 1

2 hits Apply

Propagation Delay (tpd) (1)

70 ns 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

3.3 V 2

2 hits Apply

Surface Mount (1)

YES 2

2 hits Apply

Trigger Type (1)

POSITIVE EDGE 2

2 hits Apply