Parametric results for: 54S112DM under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Logic IC Type Manufacturer Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

S 1

2 hits Apply

R-CDIP-T16 1 R-XDIP-T16 1

2 hits Apply

e0 2

2 hits Apply

J-K FLIP-FLOP 2

2 hits Apply

Manufacturer (1)

Fairchild Semiconductor Corporation 2

2 hits Apply

Number of Bits (1)

4 1

2 hits Apply

Number of Functions (1)

2.0 2

2 hits Apply

16 2

2 hits Apply

125.0 °C 2

2 hits Apply

-55.0 °C 2

2 hits Apply

COMPLEMENTARY 1

2 hits Apply

CERAMIC 1 CERAMIC, METAL-SEALED COFIRED 1

2 hits Apply

Package Code (1)

DIP 2

2 hits Apply

DIP16,.3 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

IN-LINE 2

2 hits Apply

Propagation Delay (tpd) (1)

7 ns 1

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 2

2 hits Apply

Surface Mount (1)

NO 2

2 hits Apply

Trigger Type (1)

NEGATIVE EDGE 2

2 hits Apply