-
Part Symbol
-
Footprint
-
3D Model
Available Download Formats
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Part # | Distributor | Description | Stock | Price | Buy | |
---|---|---|---|---|---|---|
DISTI #
296-28801-1-ND
|
DigiKey | IC FF JK TYPE DUAL 1BIT 16SO Min Qty: 1 Lead time: 12 Weeks Container: Cut Tape (CT), Digi-Reel®, Tape & Reel (TR) |
2000 In Stock |
|
$0.3340 / $0.8600 | Buy Now |
DISTI #
595-SN74F112NSR
|
Mouser Electronics | Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop RoHS: Compliant | 1967 |
|
$0.3090 / $0.9300 | Buy Now |
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
|
SN74F112NSR
Texas Instruments
Buy Now
Datasheet
|
Compare Parts:
SN74F112NSR
Texas Instruments
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
Part Package Code | SOIC | |
Package Description | SOP, SOP16,.3 | |
Pin Count | 16 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Texas Instruments | |
Family | F/FAST | |
JESD-30 Code | R-PDSO-G16 | |
JESD-609 Code | e4 | |
Length | 10.2 mm | |
Load Capacitance (CL) | 50 pF | |
Logic IC Type | J-K FLIP-FLOP | |
Max Frequency@Nom-Sup | 100000000 Hz | |
Max I(ol) | 0.02 A | |
Moisture Sensitivity Level | 1 | |
Number of Bits | 2 | |
Number of Functions | 2 | |
Number of Terminals | 16 | |
Operating Temperature-Max | 70 °C | |
Operating Temperature-Min | ||
Output Polarity | COMPLEMENTARY | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | SOP | |
Package Equivalence Code | SOP16,.3 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Power Supply Current-Max (ICC) | 19 mA | |
Prop. Delay@Nom-Sup | 7.5 ns | |
Propagation Delay (tpd) | 7.5 ns | |
Qualification Status | Not Qualified | |
Schmitt Trigger | NO | |
Seated Height-Max | 2 mm | |
Supply Voltage-Max (Vsup) | 5.5 V | |
Supply Voltage-Min (Vsup) | 4.5 V | |
Supply Voltage-Nom (Vsup) | 5 V | |
Surface Mount | YES | |
Technology | TTL | |
Temperature Grade | COMMERCIAL | |
Terminal Finish | NICKEL PALLADIUM GOLD | |
Terminal Form | GULL WING | |
Terminal Pitch | 1.27 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Trigger Type | NEGATIVE EDGE | |
Width | 5.3 mm | |
fmax-Min | 100 MHz |
This table gives cross-reference parts and alternative options found for SN74F112NSR. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of SN74F112NSR, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Description | Manufacturer | Compare |
---|---|---|---|
SN74F112NSRE4 | Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70 | Texas Instruments | SN74F112NSR vs SN74F112NSRE4 |
SN74F112NSRG4 | Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70 | Texas Instruments | SN74F112NSR vs SN74F112NSRG4 |
74F112SJX | J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO16, 5.30 MM, EIAJ TYPE2, SOP-16 | Fairchild Semiconductor Corporation | SN74F112NSR vs 74F112SJX |