XC4020XL-09PQG240C vs XC4020XL-2PQG240C feature comparison

XC4020XL-09PQG240C AMD Xilinx

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XC4020XL-2PQG240C AMD Xilinx

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Package Description FQFP, FQFP,
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature TYPICAL GATES = 13000-40000 MAX USABLE 20000 LOGIC GATES
Clock Frequency-Max 217 MHz 179 MHz
Combinatorial Delay of a CLB-Max 1.2 ns 1.5 ns
JESD-30 Code S-PQFP-G240 S-PQFP-G240
JESD-609 Code e3 e3
Length 32 mm 32 mm
Moisture Sensitivity Level 3 3
Number of CLBs 784 784
Number of Equivalent Gates 13000 13000
Number of Inputs 192 192
Number of Outputs 192 192
Number of Terminals 240 240
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min
Organization 784 CLBS, 13000 GATES 784 CLBS, 13000 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code FQFP FQFP
Package Shape SQUARE SQUARE
Package Style FLATPACK, FINE PITCH FLATPACK, FINE PITCH
Peak Reflow Temperature (Cel) 245 245
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.1 mm 4.1 mm
Supply Voltage-Max 3.6 V 3.6 V
Supply Voltage-Min 3 V 3 V
Supply Voltage-Nom 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade OTHER OTHER
Terminal Finish MATTE TIN MATTE TIN
Terminal Form GULL WING GULL WING
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 30 30
Width 32 mm 32 mm
Base Number Matches 1 1
Part Package Code QFP
Pin Count 240

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Compare XC4020XL-2PQG240C with alternatives