TC74ACT138P vs CD74ACT138EX feature comparison

TC74ACT138P Toshiba America Electronic Components

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CD74ACT138EX Harris Semiconductor

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Pbfree Code Yes
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer TOSHIBA CORP HARRIS SEMICONDUCTOR
Part Package Code DIP
Package Description DIP, DIP16,.3 DIP, DIP16,.3
Pin Count 16
Reach Compliance Code unknown unknown
ECCN Code EAR99 EAR99
HTS Code 8542.39.00.01 8542.39.00.01
Samacsys Manufacturer Toshiba
Family ACT ACT
Input Conditioning STANDARD STANDARD
JESD-30 Code R-PDIP-T16 R-PDIP-T16
Length 19.25 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type 3-LINE TO 8-LINE DECODER 3-LINE TO 8-LINE DECODER
Max I(ol) 0.024 A 0.024 A
Number of Functions 1 1
Number of Terminals 16 16
Operating Temperature-Max 85 °C 125 °C
Operating Temperature-Min -40 °C -55 °C
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP16,.3 DIP16,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Peak Reflow Temperature (Cel) NOT SPECIFIED
Prop. Delay@Nom-Sup 11.5 ns 12 ns
Propagation Delay (tpd) 11.5 ns 12 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.45 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL MILITARY
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.62 mm
Base Number Matches 1 3
Additional Feature 3 ENABLE INPUTS
JESD-609 Code e0
Terminal Finish TIN LEAD

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