PHD78NQ03LT vs PHD78NQ03LT/T3 feature comparison

PHD78NQ03LT NXP Semiconductors

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PHD78NQ03LT/T3 Nexperia

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Rohs Code Yes Yes
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer NXP SEMICONDUCTORS NEXPERIA
Part Package Code TO-252
Package Description PLASTIC, SC-63, DPAK-3 PLASTIC, SC-63, DPAK-3
Pin Count 3
Reach Compliance Code not_compliant unknown
ECCN Code EAR99 EAR99
Additional Feature LOGIC LEVEL COMPATIBLE LOGIC LEVEL COMPATIBLE
Avalanche Energy Rating (Eas) 100 mJ 100 mJ
Case Connection DRAIN DRAIN
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
DS Breakdown Voltage-Min 25 V 25 V
Drain Current-Max (ID) 75 A 75 A
Drain-source On Resistance-Max 0.0135 Ω 0.0135 Ω
FET Technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 Code TO-252 TO-252
JESD-30 Code R-PSSO-G2 R-PSSO-G2
JESD-609 Code e3
Moisture Sensitivity Level 1
Number of Elements 1 1
Number of Terminals 2 2
Operating Mode ENHANCEMENT MODE ENHANCEMENT MODE
Operating Temperature-Max 175 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Cel) 260 NOT SPECIFIED
Polarity/Channel Type N-CHANNEL N-CHANNEL
Power Dissipation-Max (Abs) 93 W
Pulsed Drain Current-Max (IDM) 240 A 240 A
Qualification Status Not Qualified
Surface Mount YES YES
Terminal Finish MATTE TIN
Terminal Form GULL WING GULL WING
Terminal Position SINGLE SINGLE
Transistor Application SWITCHING SWITCHING
Transistor Element Material SILICON SILICON
Base Number Matches 3 1
Date Of Intro 2017-02-01
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

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Compare PHD78NQ03LT/T3 with alternatives