MSM4256JLMB-45
vs
MT5C1005ECW-55L/IT
feature comparison
| Part Life Cycle Code |
Obsolete
|
Active
|
| Ihs Manufacturer |
MOSAIC SEMICONDUCTOR INC
|
MICROSS COMPONENTS
|
| Package Description |
,
|
CERAMIC, LCC-32
|
| Reach Compliance Code |
unknown
|
compliant
|
| ECCN Code |
3A001.A.2.C
|
EAR99
|
| HTS Code |
8542.32.00.41
|
8542.32.00.41
|
| Access Time-Max |
45 ns
|
55 ns
|
| JESD-30 Code |
R-CQCC-J32
|
R-CQCC-N32
|
| Memory Density |
1048576 bit
|
1048576 bit
|
| Memory IC Type |
STANDARD SRAM
|
STANDARD SRAM
|
| Memory Width |
4
|
4
|
| Number of Functions |
1
|
1
|
| Number of Ports |
1
|
|
| Number of Terminals |
32
|
32
|
| Number of Words |
262144 words
|
262144 words
|
| Number of Words Code |
256000
|
256000
|
| Operating Mode |
ASYNCHRONOUS
|
ASYNCHRONOUS
|
| Operating Temperature-Max |
125 °C
|
85 °C
|
| Operating Temperature-Min |
-55 °C
|
-40 °C
|
| Organization |
256KX4
|
256KX4
|
| Output Enable |
YES
|
|
| Package Body Material |
CERAMIC, METAL-SEALED COFIRED
|
CERAMIC, METAL-SEALED COFIRED
|
| Package Code |
QCCJ
|
QCCN
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
CHIP CARRIER
|
CHIP CARRIER
|
| Parallel/Serial |
PARALLEL
|
PARALLEL
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Screening Level |
MIL-STD-883 Class B (Modified)
|
|
| Supply Voltage-Max (Vsup) |
5.5 V
|
5.5 V
|
| Supply Voltage-Min (Vsup) |
4.5 V
|
4.5 V
|
| Supply Voltage-Nom (Vsup) |
5 V
|
5 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
MILITARY
|
INDUSTRIAL
|
| Terminal Form |
J BEND
|
NO LEAD
|
| Terminal Position |
QUAD
|
QUAD
|
| Base Number Matches |
2
|
1
|
| Part Package Code |
|
QFJ
|
| Pin Count |
|
32
|
| Length |
|
19.05 mm
|
| Seated Height-Max |
|
2.3622 mm
|
| Terminal Pitch |
|
1.27 mm
|
| Width |
|
11.43 mm
|
|
|
|
Compare MSM4256JLMB-45 with alternatives
Compare MT5C1005ECW-55L/IT with alternatives