JMAS31750AL
vs
IDT79R3051-20GB
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
GEC PLESSEY SEMICONDUCTORS
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
,
CAVITY DOWN, CERAMIC, PGA-84
Reach Compliance Code
unknown
not_compliant
ECCN Code
3A001.A.2.C
3A991.A.2
HTS Code
8542.31.00.01
8542.31.00.01
Additional Feature
INTERNAL THREE BUS DATA PATH; MIL-STD-1750A INSTRUCTION SET ARCHITECTURE
Address Bus Width
16
32
Bit Size
32
32
Boundary Scan
NO
NO
Clock Frequency-Max
22 MHz
40 MHz
External Data Bus Width
17
32
Format
FIXED POINT
FIXED POINT
Integrated Cache
NO
NO
JESD-30 Code
S-CPGA-P84
S-CPGA-P84
Low Power Mode
YES
NO
Number of DMA Channels
Number of External Interrupts
8
6
Number of Serial I/Os
Number of Terminals
84
84
On Chip Data RAM Width
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-55 °C
-55 °C
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
PGA
PGA
Package Shape
SQUARE
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Qualification Status
Not Qualified
Not Qualified
RAM (words)
0
0
Speed
22 MHz
20 MHz
Supply Voltage-Max
5.5 V
5.5 V
Supply Voltage-Min
4.5 V
4.5 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
MILITARY
Terminal Form
PIN/PEG
PIN/PEG
Terminal Position
PERPENDICULAR
PERPENDICULAR
uPs/uCs/Peripheral ICs Type
MICROPROCESSOR
MICROPROCESSOR, RISC
Base Number Matches
1
1
Rohs Code
Part Package Code
PGA
Pin Count
84
JESD-609 Code
e0
Length
30.6705 mm
Package Equivalence Code
PGA84,12X12
Screening Level
38535Q/M;38534H;883B
Seated Height-Max
5.207 mm
Supply Current-Max
350 mA
Terminal Finish
TIN LEAD
Terminal Pitch
2.54 mm
Width
30.6705 mm
Compare JMAS31750AL with alternatives
Compare IDT79R3051-20GB with alternatives