IDT7202LA12TDG vs 7202LA12SOG feature comparison

IDT7202LA12TDG Integrated Device Technology Inc

Buy Now Datasheet

7202LA12SOG Integrated Device Technology Inc

Buy Now Datasheet
Pbfree Code Yes Yes
Rohs Code Yes Yes
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code DIP SOIC
Package Description DIP, GREEN, SOIC-28
Pin Count 28 28
Reach Compliance Code compliant compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.71 8542.32.00.71
Access Time-Max 12 ns 12 ns
Additional Feature RETRANSMIT RETRANSMIT
Cycle Time 20 ns 20 ns
JESD-30 Code R-GDIP-T28 R-PDSO-G28
JESD-609 Code e3 e3
Length 37.1475 mm 18.3642 mm
Memory Density 9216 bit 9216 bit
Memory Width 9 9
Number of Functions 1 1
Number of Terminals 28 28
Number of Words 1024 words 1024 words
Number of Words Code 1000 1000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 1KX9 1KX9
Output Enable NO NO
Package Body Material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
Package Code DIP SOP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE SMALL OUTLINE
Parallel/Serial PARALLEL PARALLEL
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 3.048 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish MATTE TIN TIN
Terminal Form THROUGH-HOLE GULL WING
Terminal Pitch 2.54 mm 1.27 mm
Terminal Position DUAL DUAL
Width 7.62 mm 8.763 mm
Base Number Matches 1 4
Manufacturer Package Code PEG28
Date Of Intro 1988-01-01
Clock Frequency-Max (fCLK) 50 MHz
Memory IC Type OTHER FIFO
Moisture Sensitivity Level 3
Package Equivalence Code SOP28,.5
Peak Reflow Temperature (Cel) 260
Standby Current-Max 0.005 A
Supply Current-Max 0.08 mA

Compare IDT7202LA12TDG with alternatives

Compare 7202LA12SOG with alternatives