IDT71322L70J vs IDT71322S70L52B feature comparison

IDT71322L70J Integrated Device Technology Inc

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IDT71322S70L52B Integrated Device Technology Inc

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code LCC LCC
Package Description PLASTIC, LCC-52 HERMETIC SEALED, LCC-52
Pin Count 52 52
Reach Compliance Code not_compliant not_compliant
ECCN Code EAR99 3A001.A.2.C
HTS Code 8542.32.00.41 8542.32.00.41
Access Time-Max 70 ns 70 ns
Additional Feature BATTERY BACKUP OPERATION BATTERY BACKUP OPERATION
JESD-30 Code S-PQCC-J52 S-CQCC-N52
JESD-609 Code e0 e0
Length 19.1262 mm 19.05 mm
Memory Density 16384 bit 16384 bit
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM
Memory Width 8 8
Moisture Sensitivity Level 1
Number of Functions 1 1
Number of Ports 2 2
Number of Terminals 52 52
Number of Words 2048 words 2048 words
Number of Words Code 2000 2000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -55 °C
Organization 2KX8 2KX8
Output Characteristics 3-STATE 3-STATE
Package Body Material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
Package Code QCCJ QCCN
Package Equivalence Code LDCC52,.8SQ LCC52,.75SQ
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 225
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.57 mm 2.2098 mm
Standby Current-Max 0.0015 A 0.03 A
Standby Voltage-Min 2 V 4.5 V
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL MILITARY
Terminal Finish TIN LEAD TIN LEAD
Terminal Form J BEND NO LEAD
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 20
Width 19.1262 mm 19.05 mm
Base Number Matches 1 1
Screening Level 38535Q/M;38534H;883B

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