HD74LV08AFPEL-E vs TC74LVX08FELP feature comparison

HD74LV08AFPEL-E Renesas Electronics Corporation

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TC74LVX08FELP Toshiba America Electronic Components

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Pbfree Code Yes No
Rohs Code Yes No
Part Life Cycle Code Obsolete Active
Ihs Manufacturer RENESAS ELECTRONICS CORP TOSHIBA CORP
Part Package Code SOIC SOIC
Package Description SOP, SOP14,.3 SOP,
Pin Count 14 14
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01
Family LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14 R-PDSO-G14
Length 10.06 mm 10.3 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type AND GATE AND GATE
Max I(ol) 0.006 A
Moisture Sensitivity Level 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Equivalence Code SOP14,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Packing Method TR
Prop. Delay@Nom-Sup 14 ns
Propagation Delay (tpd) 20 ns 12 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger NO
Seated Height-Max 2.2 mm 1.9 mm
Supply Voltage-Max (Vsup) 5.5 V 3.6 V
Supply Voltage-Min (Vsup) 2 V 2 V
Supply Voltage-Nom (Vsup) 2.5 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Width 5.5 mm 5.3 mm
Base Number Matches 1 1
JESD-609 Code e0
Peak Reflow Temperature (Cel) 240
Terminal Finish TIN LEAD
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

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Compare TC74LVX08FELP with alternatives