EPM5128LC68
vs
EPM5130LC84
feature comparison
| Rohs Code |
No
|
|
| Part Life Cycle Code |
Transferred
|
Obsolete
|
| Ihs Manufacturer |
ALTERA CORP
|
CYPRESS SEMICONDUCTOR CORP
|
| Part Package Code |
LCC
|
LCC
|
| Package Description |
QCCJ, LDCC68,1.0SQ
|
QCCJ,
|
| Pin Count |
68
|
84
|
| Reach Compliance Code |
unknown
|
unknown
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Additional Feature |
128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
|
128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
|
| Clock Frequency-Max |
33.3 MHz
|
33.3 MHz
|
| In-System Programmable |
NO
|
|
| JESD-30 Code |
S-PQCC-J68
|
S-PQCC-J84
|
| JESD-609 Code |
e0
|
|
| JTAG BST |
NO
|
|
| Length |
24.23 mm
|
29.3116 mm
|
| Number of Dedicated Inputs |
7
|
19
|
| Number of I/O Lines |
52
|
48
|
| Number of Macro Cells |
128
|
|
| Number of Terminals |
68
|
84
|
| Operating Temperature-Max |
70 °C
|
70 °C
|
| Operating Temperature-Min |
|
|
| Organization |
7 DEDICATED INPUTS, 52 I/O
|
19 DEDICATED INPUTS, 48 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
QCCJ
|
QCCJ
|
| Package Equivalence Code |
LDCC68,1.0SQ
|
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
CHIP CARRIER
|
CHIP CARRIER
|
| Peak Reflow Temperature (Cel) |
220
|
|
| Programmable Logic Type |
OT PLD
|
OT PLD
|
| Propagation Delay |
55 ns
|
55 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
5.08 mm
|
5.08 mm
|
| Supply Voltage-Max |
5.25 V
|
5.25 V
|
| Supply Voltage-Min |
4.75 V
|
4.75 V
|
| Supply Voltage-Nom |
5 V
|
5 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL
|
COMMERCIAL
|
| Terminal Finish |
TIN LEAD
|
|
| Terminal Form |
J BEND
|
J BEND
|
| Terminal Pitch |
1.27 mm
|
1.27 mm
|
| Terminal Position |
QUAD
|
QUAD
|
| Width |
24.23 mm
|
29.3116 mm
|
| Base Number Matches |
2
|
2
|
|
|
|
Compare EPM5128LC68 with alternatives
Compare EPM5130LC84 with alternatives